FPGA ARCHITECTURE OF DIFFERENT VENDORS
FPGA ARCHITECTURE
OF DIFFERENT VENDORS
ABSTRACT:
Field-Programmable
Gate Arrays (FPGAs) are integrated circuits which may be programmed to
implement virtually any digital circuit. This programmability provides a
low-risk, low-turn around time option for implementing digital circuits. This programmability comes at a price, how
ever. Typically, circuits implemented on FPGAs are
3 times as slow and have just one tenth the density of circuits implemented
using more conventional techniques. Much of this area and speed penalty is
thanks to the programmable routing structures contained within the FPGA.
In
this survey, we'll focus routing
structures of various vendors. First, we
specialize in a switch block, which may be a programmable switch connecting fixed routing tracks. A typical FPGA contains several hundred
switch blocks. Second, we specialize in the logic block Interconnect Matrix,
which may be a programmable switch connecting logic elements
INTRODUCTION:
Since
their inception in 1985, Field Programmable Gate Arrays (FPGAs) have emerged as
a number one choice of technology for
the implementation of the many digital circuits and systems. New commercial architectures offer sort of
features like densities of up to three.2 million system gates,on-chip single or
dual port memories, digital phase lock loops for clock management, and system
performance up to 311 MHz [19-24], making FPGAs ideal not just for glue logic
but also for the implementation of entire systems.
Field
Programmable Gate Arrays (FPGAs), Complex Programmable Logic Devices
(CPLDs),and Masked Programmable Gate Arrays (MPGAs) are a part of a
programmable logic family which provides an alternate way of designing and
implementing digital circuits. the normal approach consists of designing a chip
to satisfy a group of specific requirements which can't be changed once the
planning is complete. In contrast, a
programmable logic device are often programmed “in the field”, resulting in
lower time to plug, and lower non-recurring engineering(NRE) costs.
additionally many programmable devices are often re-programmed repeatedly,
resulting in a faster recovery from design errors, and therefore the ability to
vary the planning as requirements change, either late within the design cycle, or
in subsequent generations of a product.Of all programmable devices, one among
the foremost common is that the Field Programmable Gate Array (FPGA). Compared to other programmable devices, an
FPGA offers the very best logic density, a good speed-area trade-off, and a
really general architecture suitable for a good range of applications. FPGAs are getting used in prototyping of
styles, communication encoding and filtering, random logic, video communication
systems, real time image processing, device controllers,computer peripherals,
pattern matching, high speed graphics, digital signal processing and therefore
the list goes on. PLD shipments from various vendors are expected to exceed $3
billion for 1999. The advantages of FPGAs come at a price, however. the
character of their architecture, and the abundance of user-programmable
switches makes them relatively slow compared to another devices within the
programmable logic family. Regardless,
FPGAs have a significant impact on the way a digital circuit design is completed
today.
FPGA ARCHITECTURE:
There
are many various FPGA architectures available from various vendors including
Altera
[19],
Xilinx [20], Actel [21], Lucent [22], QuickLogic [23], and Cypress [24]. Although the
exact
structure of those FPGAs varies from vendor to vendor, all FPGAs contains three
funda
mental
components: Logic Blocks, I/O blocks, and therefore the Programmable
Routing. What comprises of a logic
block, and the way the programmable routing is organized defines a specific
architecture. A logic block is employed to implement alittle portion of the
circuit being implemented using an FPGA.
The programmable routing is employed to form all the specified
connections among various logic block and therefore the required connections to
the I/O (input/output) blocks. Many
commercially available FPGAs use an Island-style architecture during which
logic blocks are organized in an array separated by horizontal and vertical
programmable routing channel
ROUTING RESOURCES:
The
programmable routing in an FPGA consists of two categories: (1) routing within
each Logic
Block/Logic
Cluster, and (2) routing between the Logic Blocks/Logic Clusters.
For
the routing between the logic blocks/logic clusters, the foremost important structure may be a Switch Block and
for routing within each logic block
interconnection matrix is employed
-
Static RAM
-
Anti fuse
-
EPROM
EEPROM
General
Architecture of Xilinx FPGAs:
Basic
logic cells CLBs(Configurable Logic Blocks) are bigger and more complex than
the Actel or Quick Logic cells. The Xilinx LCA basic cell is an example of a
rough grain architecture that has both combinational logic and Flip Flop (FF).
The XC3000 has five logic inputs, as common clock, FF, MUXs,……Using
programmable MUXs connected to the SRAM programming cells, outputs of two CLBs
X and Y can been independently connected to the outputs of FFQx and Qy or to
the outputs of the Combinational Logic F& G.
ACTEL FPGA ARCHITECTURE:
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